Intel® Quark™ Microcontroller Software Interface 1.4.0 Intel® Quark™ Microcontroller BSP

- Main Page
- Modules
- Data Structures
- Files

Enumerations | Functions
SS Power states

SS Power mode control for Quark SE Microcontrollers. More...

## Enumerations
enum | qm_ss_power_cpu_ss1_mode_t { QM_SS_POWER_CPU_SS1_TIMER_OFF = 0, QM_SS_POWER_CPU_SS1_TIMER_ON }
| Sensor Subsystem SS1 Timers mode type. More...

## Functions
void | qm_ss_power_soc_lpss_enable (void)
| Enable LPSS state entry. More...
void | qm_ss_power_soc_sleep_restore (void)
| Enter SoC sleep state and restore after wake up. More...
void | qm_ss_power_soc_deep_sleep_restore (void)
| Enter SoC sleep state and restore after wake up. More...
void | qm_ss_power_sleep_wait (void)
| Save context, enter ARC SS1 power save state and restore after wake up. More...
void | qm_power_soc_set_ss_restore_flag (void)
| Enable the SENSOR startup restore flag.
void | qm_ss_power_soc_lpss_disable (void)
| Disable LPSS state entry. More...
void | qm_ss_power_cpu_ss1 (const qm_ss_power_cpu_ss1_mode_t mode)
| Enter Sensor SS1 state. More...
void | qm_ss_power_cpu_ss2 (void)
| Enter Sensor SS2 state or SoC LPSS state. More...

## Detailed Description

SS Power mode control for Quark SE Microcontrollers.

## Enumeration Type Documentation

enum qm_ss_power_cpu_ss1_mode_t

Sensor Subsystem SS1 Timers mode type.

Enumerator
QM_SS_POWER_CPU_SS1_TIMER_OFF | Disable SS Timers in SS1.
QM_SS_POWER_CPU_SS1_TIMER_ON | Keep SS Timers enabled in SS1.

Definition at line 21 of file ss_power_states.h.

## Function Documentation

void qm_ss_power_cpu_ss1 | ( | const qm_ss_power_cpu_ss1_mode_t | mode | ) |

Enter Sensor SS1 state.

Put the Sensor Subsystem into SS1.
Processor Clock is gated in this state.

A wake event causes the Sensor Subsystem to transition to SS0.
A wake event is a sensor subsystem interrupt.

According to the mode selected, Sensor Subsystem Timers can be disabled.

Parameters

  [in] | mode | Mode selection for SS1 state.

Definition at line 91 of file ss_power_states.c.

References QM_SS_POWER_CPU_SS1_TIMER_OFF, and QM_SS_POWER_CPU_SS1_TIMER_ON.

Referenced by qm_ss_power_sleep_wait().

void qm_ss_power_cpu_ss2 | ( | void |  | ) |

Enter Sensor SS2 state or SoC LPSS state.

Put the Sensor Subsystem into SS2.
Sensor Complex Clock is gated in this state.
Sensor Peripherals are gated in this state.

This enables entry in LPSS if:

- Sensor Subsystem is in SS2
- Lakemont is in C2 or C2LP
- LPSS entry is enabled

A wake event causes the Sensor Subsystem to transition to SS0.
There are two kinds of wake event depending on the Sensor Subsystem and SoC state:

- SS2: a wake event is a Sensor Subsystem interrupt
- LPSS: a wake event is a Sensor Subsystem interrupt or a Lakemont interrupt

LPSS wake events apply if LPSS is entered. If Host wakes the SoC from LPSS, Sensor also transitions back to SS0.

Definition at line 122 of file ss_power_states.c.

void qm_ss_power_sleep_wait | ( | void |  | ) |

Save context, enter ARC SS1 power save state and restore after wake up.

This routine is same as qm_ss_power_soc_sleep_restore(), just instead of going to sleep it will go to SS1 power save state. Note: this function has a while(1) which will spin until we enter (and exit) sleep and the power state change will be managed by the other core.

Definition at line 196 of file ss_power_states.c.

References qm_power_soc_set_ss_restore_flag(), qm_ss_power_cpu_ss1(), and QM_SS_POWER_CPU_SS1_TIMER_ON.

void qm_ss_power_soc_deep_sleep_restore | ( | void |  | ) |

Enter SoC sleep state and restore after wake up.

Put the ARC core into sleep state until next SoC wake event and continue execution after wake up where the application stopped.

If the library is built with ENABLE_RESTORE_CONTEXT=1, then this function will use the arc_restore_addr to save restore trap address which brings back the ARC CPU to the point where this function was called. This means that applications should refrain from using them.

This function calls qm_ss_save_context and qm_ss_restore_context in order to restore execution where it stopped. All power management transitions are done by power_qm_soc_deep_sleep().

Definition at line 168 of file ss_power_states.c.

References qm_power_soc_deep_sleep(), and qm_power_soc_set_ss_restore_flag().

void qm_ss_power_soc_lpss_disable | ( | void |  | ) |

Disable LPSS state entry.

Clear LPSS enable flag.
Disable Clock Gating of ADC, I2C0, I2C1, SPI0 and SPI1 sensor peripherals.
This will prevent entry in LPSS when cores are in C2/C2LP and SS2 states.

Definition at line 64 of file ss_power_states.c.

References SOCW_EVENT_REGISTER, and SOCW_REG_CCU_LP_CLK_CTL.

void qm_ss_power_soc_lpss_enable | ( | void |  | ) |

Enable LPSS state entry.

Put the SoC into LPSS on next C2/C2LP and SS2 state combination.
This function needs to be called on the Sensor Core to Clock Gate ADC, I2C0, I2C1, SPI0 and SPI1 sensor peripherals.
Clock Gating sensor peripherals is a requirement to enter LPSS state.
After LPSS, qm_ss_power_soc_lpss_disable needs to be called to restore clock gating.

This needs to be called before any transition to C2/C2LP and SS2 in order to enter LPSS.
SoC Hybrid Clock is gated in this state.
Core Well Clocks are gated.
RTC is the only clock running.

Possible SoC wake events are:

- Low Power Comparator Interrupt
- AON GPIO Interrupt
- AON Timer Interrupt
- RTC Interrupt

Definition at line 41 of file ss_power_states.c.

References SOCW_EVENT_REGISTER, and SOCW_REG_CCU_LP_CLK_CTL.

void qm_ss_power_soc_sleep_restore | ( | void |  | ) |

Enter SoC sleep state and restore after wake up.

Put the ARC core into sleep state until next SoC wake event and continue execution after wake up where the application stopped.

If the library is built with ENABLE_RESTORE_CONTEXT=1, then this function will use the arc_restore_addr to save restore trap address which brings back the ARC CPU to the point where this function was called. This means that applications should refrain from using them.

This function calls qm_ss_save_context and qm_ss_restore_context in order to restore execution where it stopped. All power management transitions are done by qm_power_soc_sleep().

Definition at line 141 of file ss_power_states.c.

References qm_power_soc_set_ss_restore_flag(), and qm_power_soc_sleep().