Intel® Quark™ Microcontroller Software Interface 1.4.0 Intel® Quark™ Microcontroller BSP

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Data Fields
qm_usb_reg_t Struct Reference
SoC Registers (SE)

USB Register block type. More...

`#include <qm_soc_regs.h>`

## Data Fields
QM_RW uint32_t | gotgctl
| OTG Control. More...
QM_RW uint32_t | gotgint
| OTG Interrupt. More...
QM_RW uint32_t | gahbcfg
| AHB Configuration. More...
QM_RW uint32_t | gusbcfg
| USB Configuration. More...
QM_RW uint32_t | grstctl
| Reset Register. More...
QM_RW uint32_t | gintsts
| Interrupt Status. More...
QM_RW uint32_t | gintmsk
| Interrupt Mask. More...
QM_R uint32_t | grxstsr
| Receive Status Read/Pop. More...
QM_R uint32_t | grxstsp
| Receive Status Read/Pop. More...
QM_R uint32_t | grxfsiz
| Receive FIFO Size. More...
QM_R uint32_t | gnptxfsiz
| Non-periodic Transmit FIFO Size. More...
QM_R uint32_t | gsnpsid
| Synopsys ID. More...
QM_R uint32_t | ghwcfg1
| HW config - Endpoint direction. More...
QM_R uint32_t | ghwcfg2
| HW config 2. More...
QM_R uint32_t | ghwcfg3
| HW config 3. More...
QM_R uint32_t | ghwcfg4
| HW config 4. More...
QM_RW uint32_t | gdfifocfg
| Global DFIFO Configuration. More...
QM_RW uint32_t | dcfg
| Device config. More...
QM_RW uint32_t | dctl
| Device control. More...
QM_RW uint32_t | dsts
| Device Status. More...
QM_RW uint32_t | diepmsk
| IN EP Common Interrupt Mask. More...
QM_RW uint32_t | doepmsk
| OUT EP Common Interrupt Mask. More...
QM_R uint32_t | daint
| Device Interrupt Register. More...
QM_RW uint32_t | daintmsk
| Device Interrupt Mask Register. More...
QM_RW uint32_t | dvbusdis
| VBUS discharge time register. More...
QM_RW uint32_t | dvbuspulse
| Device VBUS discharge time. More...
QM_RW uint32_t | dthrctl
| Device Threshold Ctrl. More...
QM_RW uint32_t | diepempmsk
| IN EP FIFO Empty Intr Mask. More...

## Detailed Description

USB Register block type.

Definition at line 1987 of file qm_soc_regs.h.

## Field Documentation

QM_R uint32_t qm_usb_reg_t::daint

Device Interrupt Register.

Definition at line 2019 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::daintmsk

Device Interrupt Mask Register.

Definition at line 2020 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::dcfg

Device config.

Definition at line 2013 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::dctl

Device control.

Definition at line 2014 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::diepempmsk

IN EP FIFO Empty Intr Mask.

Definition at line 2025 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::diepmsk

IN EP Common Interrupt Mask.

Definition at line 2017 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::doepmsk

OUT EP Common Interrupt Mask.

Definition at line 2018 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::dsts

Device Status.

Definition at line 2015 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::dthrctl

Device Threshold Ctrl.

Definition at line 2024 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::dvbusdis

VBUS discharge time register.

Definition at line 2022 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::dvbuspulse

Device VBUS discharge time.

Definition at line 2023 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::gahbcfg

AHB Configuration.

Definition at line 1990 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::gdfifocfg

Global DFIFO Configuration.

Definition at line 2005 of file qm_soc_regs.h.

QM_R uint32_t qm_usb_reg_t::ghwcfg1

HW config - Endpoint direction.

Definition at line 2001 of file qm_soc_regs.h.

QM_R uint32_t qm_usb_reg_t::ghwcfg2

HW config 2.

Definition at line 2002 of file qm_soc_regs.h.

QM_R uint32_t qm_usb_reg_t::ghwcfg3

HW config 3.

Definition at line 2003 of file qm_soc_regs.h.

QM_R uint32_t qm_usb_reg_t::ghwcfg4

HW config 4.

Definition at line 2004 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::gintmsk

Interrupt Mask.

Definition at line 1994 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::gintsts

Interrupt Status.

Definition at line 1993 of file qm_soc_regs.h.

QM_R uint32_t qm_usb_reg_t::gnptxfsiz

Non-periodic Transmit FIFO Size.

Definition at line 1998 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::gotgctl

OTG Control.

Definition at line 1988 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::gotgint

OTG Interrupt.

Definition at line 1989 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::grstctl

Reset Register.

Definition at line 1992 of file qm_soc_regs.h.

QM_R uint32_t qm_usb_reg_t::grxfsiz

Receive FIFO Size.

Definition at line 1997 of file qm_soc_regs.h.

QM_R uint32_t qm_usb_reg_t::grxstsp

Receive Status Read/Pop.

Definition at line 1996 of file qm_soc_regs.h.

QM_R uint32_t qm_usb_reg_t::grxstsr

Receive Status Read/Pop.

Definition at line 1995 of file qm_soc_regs.h.

QM_R uint32_t qm_usb_reg_t::gsnpsid

Synopsys ID.

Definition at line 2000 of file qm_soc_regs.h.

QM_RW uint32_t qm_usb_reg_t::gusbcfg

USB Configuration.

Definition at line 1991 of file qm_soc_regs.h.