Intel® Quark™ Microcontroller Software Interface 1.4.0 Intel® Quark™ Microcontroller BSP

- Main Page
- Modules
- Data Structures
- Files

Functions
SS ISR

Sensor Subsystem Interrupt Service Routines. More...

## Functions
| QM_ISR_DECLARE (qm_ss_adc_0_isr)
| ISR for ADC interrupt. More...
| QM_ISR_DECLARE (qm_ss_adc_0_error_isr)
| ISR for ADC error interrupt. More...
| QM_ISR_DECLARE (qm_ss_adc_0_cal_isr)
| ISR for SS ADC 0 calibration interrupt. More...
| QM_ISR_DECLARE (qm_ss_adc_0_pwr_isr)
| ISR for SS ADC 0 mode change interrupt. More...
| QM_ISR_DECLARE (qm_ss_gpio_0_isr)
| ISR for GPIO 0 error interrupt. More...
| QM_ISR_DECLARE (qm_ss_gpio_1_isr)
| ISR for GPIO 1 error interrupt. More...
| QM_ISR_DECLARE (qm_ss_i2c_0_error_isr)
| ISR for I2C 0 error interrupt. More...
| QM_ISR_DECLARE (qm_ss_i2c_0_rx_avail_isr)
| ISR for I2C 0 RX data available interrupt. More...
| QM_ISR_DECLARE (qm_ss_i2c_0_tx_req_isr)
| ISR for I2C 0 TX data requested interrupt. More...
| QM_ISR_DECLARE (qm_ss_i2c_0_stop_det_isr)
| ISR for I2C 0 STOP detected interrupt. More...
| QM_ISR_DECLARE (qm_ss_i2c_1_error_isr)
| ISR for I2C 1 error interrupt. More...
| QM_ISR_DECLARE (qm_ss_i2c_1_rx_avail_isr)
| ISR for I2C 1 RX data available interrupt. More...
| QM_ISR_DECLARE (qm_ss_i2c_1_tx_req_isr)
| ISR for I2C 1 TX data requested interrupt. More...
| QM_ISR_DECLARE (qm_ss_i2c_1_stop_det_isr)
| ISR for I2C 1 STOP detected interrupt. More...
| QM_ISR_DECLARE (qm_ss_spi_0_error_isr)
| ISR for SPI 0 error interrupt. More...
| QM_ISR_DECLARE (qm_ss_spi_1_error_isr)
| ISR for SPI 1 error interrupt. More...
| QM_ISR_DECLARE (qm_ss_spi_0_tx_req_isr)
| ISR for SPI 0 TX data requested interrupt. More...
| QM_ISR_DECLARE (qm_ss_spi_1_tx_req_isr)
| ISR for SPI 1 TX data requested interrupt. More...
| QM_ISR_DECLARE (qm_ss_spi_0_rx_avail_isr)
| ISR for SPI 0 RX data available interrupt. More...
| QM_ISR_DECLARE (qm_ss_spi_1_rx_avail_isr)
| ISR for SPI 1 data available interrupt. More...
| QM_ISR_DECLARE (qm_ss_timer_0_isr)
| ISR for SS Timer 0 interrupt. More...

## Detailed Description

Sensor Subsystem Interrupt Service Routines.

## Function Documentation

QM_ISR_DECLARE | ( | qm_ss_adc_0_isr |  | ) |

ISR for ADC interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_ADC_0_INT, qm_ss_adc_0_isr);

if IRQ based conversions are used.

Definition at line 197 of file qm_ss_adc.c.

References QM_SS_ADC_0.

QM_ISR_DECLARE | ( | qm_ss_adc_0_error_isr |  | ) |

ISR for ADC error interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_ADC_0_ERROR_INT,
qm_ss_adc_0_error_isr);

if IRQ based conversions are used.

Definition at line 203 of file qm_ss_adc.c.

References QM_SS_ADC_0.

QM_ISR_DECLARE | ( | qm_ss_adc_0_cal_isr |  | ) |

ISR for SS ADC 0 calibration interrupt.

This function needs to be registered with

QM_IRQ_REQUEST(QM_SS_IRQ_ADC_0_CAL_INT, qm_ss_adc_0_cal_isr);

if IRQ based calibration is used.

Definition at line 215 of file qm_ss_adc.c.

References QM_SS_ADC_0.

QM_ISR_DECLARE | ( | qm_ss_adc_0_pwr_isr |  | ) |

ISR for SS ADC 0 mode change interrupt.

This function needs to be registered with

QM_IRQ_REQUEST(QM_SS_IRQ_ADC_0_PWR_INT, qm_ss_adc_0_pwr_isr);

if IRQ based mode change is used.

Definition at line 209 of file qm_ss_adc.c.

References QM_SS_ADC_0.

QM_ISR_DECLARE | ( | qm_ss_gpio_0_isr |  | ) |

ISR for GPIO 0 error interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_GPIO_0_INT, qm_ss_gpio_0_isr);

if IRQ based transfers are used.

Definition at line 27 of file qm_ss_gpio.c.

QM_ISR_DECLARE | ( | qm_ss_gpio_1_isr |  | ) |

ISR for GPIO 1 error interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_GPIO_1_INT, qm_ss_gpio_1_isr);

if IRQ based transfers are used.

Definition at line 32 of file qm_ss_gpio.c.

QM_ISR_DECLARE | ( | qm_ss_i2c_0_error_isr |  | ) |

ISR for I2C 0 error interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_I2C_0_ERROR_INT, qm_ss_i2c_0_error_isr);

if IRQ based transfers are used.

Definition at line 294 of file qm_ss_i2c.c.

QM_ISR_DECLARE | ( | qm_ss_i2c_0_rx_avail_isr |  | ) |

ISR for I2C 0 RX data available interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_I2C_0_RX_AVAIL_INT,
qm_ss_i2c_0_rx_avail_isr);

if IRQ based transfers are used.

Definition at line 299 of file qm_ss_i2c.c.

QM_ISR_DECLARE | ( | qm_ss_i2c_0_tx_req_isr |  | ) |

ISR for I2C 0 TX data requested interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_I2C_0_TX_REQ_INT, qm_ss_i2c_0_tx_req_isr);

if IRQ based transfers are used.

Definition at line 304 of file qm_ss_i2c.c.

QM_ISR_DECLARE | ( | qm_ss_i2c_0_stop_det_isr |  | ) |

ISR for I2C 0 STOP detected interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_I2C_0_STOP_DET_INT,
qm_ss_i2c_0_stop_det_isr);

if IRQ based transfers are used.

Definition at line 309 of file qm_ss_i2c.c.

QM_ISR_DECLARE | ( | qm_ss_i2c_1_error_isr |  | ) |

ISR for I2C 1 error interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_I2C_1_ERROR_INT, qm_ss_i2c_1_error_isr);

if IRQ based transfers are used.

Definition at line 314 of file qm_ss_i2c.c.

QM_ISR_DECLARE | ( | qm_ss_i2c_1_rx_avail_isr |  | ) |

ISR for I2C 1 RX data available interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_I2C_1_RX_AVAIL_INT,
qm_ss_i2c_1_rx_avail_isr);

if IRQ based transfers are used.

Definition at line 319 of file qm_ss_i2c.c.

QM_ISR_DECLARE | ( | qm_ss_i2c_1_tx_req_isr |  | ) |

ISR for I2C 1 TX data requested interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_I2C_1_TX_REQ_INT, qm_ss_i2c_1_tx_req_isr);

if IRQ based transfers are used.

Definition at line 324 of file qm_ss_i2c.c.

QM_ISR_DECLARE | ( | qm_ss_i2c_1_stop_det_isr |  | ) |

ISR for I2C 1 STOP detected interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_I2C_1_STOP_DET_INT,
qm_ss_i2c_1_stop_det_isr);

if IRQ based transfers are used.

Definition at line 329 of file qm_ss_i2c.c.

QM_ISR_DECLARE | ( | qm_ss_spi_0_error_isr |  | ) |

ISR for SPI 0 error interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_SPI_0_ERROR_INT,
qm_ss_spi_0_error_isr);

if IRQ based transfers are used.

Definition at line 413 of file qm_ss_spi.c.

References QM_SS_SPI_0.

QM_ISR_DECLARE | ( | qm_ss_spi_1_error_isr |  | ) |

ISR for SPI 1 error interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_SPI_1_ERROR_INT,
qm_ss_spi_1_error_isr);

if IRQ based transfers are used.

Definition at line 417 of file qm_ss_spi.c.

References QM_SS_SPI_1.

QM_ISR_DECLARE | ( | qm_ss_spi_0_tx_req_isr |  | ) |

ISR for SPI 0 TX data requested interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_SPI_0_TX_REQ_INT,
qm_ss_spi_0_tx_req_isr);

if IRQ based transfers are used.

Definition at line 429 of file qm_ss_spi.c.

References QM_SS_SPI_0.

QM_ISR_DECLARE | ( | qm_ss_spi_1_tx_req_isr |  | ) |

ISR for SPI 1 TX data requested interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_SPI_1_TX_REQ_INT,
qm_ss_spi_1_tx_req_isr);

if IRQ based transfers are used.

Definition at line 433 of file qm_ss_spi.c.

References QM_SS_SPI_1.

QM_ISR_DECLARE | ( | qm_ss_spi_0_rx_avail_isr |  | ) |

ISR for SPI 0 RX data available interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_SPI_0_RX_AVAIL_INT,
qm_ss_spi_0_rx_avail_isr);

if IRQ based transfers are used.

Definition at line 421 of file qm_ss_spi.c.

References QM_SS_SPI_0.

QM_ISR_DECLARE | ( | qm_ss_spi_1_rx_avail_isr |  | ) |

ISR for SPI 1 data available interrupt.

This function needs to be registered with

qm_ss_irq_request(QM_SS_IRQ_SPI_1_RX_AVAIL_INT,
qm_ss_spi_1_rx_avail_isr);

if IRQ based transfers are used.

Definition at line 425 of file qm_ss_spi.c.

References QM_SS_SPI_1.

QM_ISR_DECLARE | ( | qm_ss_timer_0_isr |  | ) |

ISR for SS Timer 0 interrupt.

This function needs to be registered with

qm_ss_int_vector_request(QM_ARC_TIMER_0_INT, qm_ss_timer_0_isr);

Definition at line 24 of file qm_ss_timer.c.