
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Copyright (2002-2013) Intel Corporation All Rights Reserved.
; The source code contained or described herein and all documents related
; to the source code (“Material”) are owned by Intel Corporation or its
; suppliers or licensors. Title to the Material remains with Intel
; Corporation or its suppliers and licensors. The Material contains trade
; secrets and proprietary and confidential information of Intel or its
; suppliers and licensors. The Material is protected by worldwide copyright
; and trade secret laws and treaty provisions. No part of the Material may
; be used, copied, reproduced, modified, published, uploaded, posted,
; transmitted, distributed, or disclosed in any way without Intel's prior
; No license under any patent, copyright, trade secret or other
; intellectual property right is granted to or conferred upon you by
; disclosure or delivery of the Materials, either expressly, by
; implication, inducement, estoppel or otherwise. Any license under such
; intellectual property rights must be express and approved by Intel in
;------------------------------------------------------------------------
;************** BEGIN INTEL DISPLAY DRIVER REGISTRY ENTRY ***************
;************************************************************************
[HKEY_LOCAL_MACHINE\Drivers\BuiltIn\PCI\Template\EMGD]
“VendorID”=multi_sz:”8086”, “8086”
“DeviceID”=multi_sz:”8108”, “4108”
; US15 is the only chipset supporting interrupts
[HKEY_LOCAL_MACHINE\System\GDI\Drivers]
;MKM May 2010: IClass for Power MGT - ENABLE FOR TESTING ONLY!
; “IClass”=”{EB91C7C9-8BF6-4a2d-9AB8-69724EED97D1}”
;[HKEY_LOCAL_MACHINE\System\GDI\Drivers]
; “MainDisplay”=”ddi_emgd.dll”
[HKEY_LOCAL_MACHINE\System\GDI\Drivers]
[HKEY_LOCAL_MACHINE\System\D3DM\Drivers]
;************************************************************************
; The Following Sections Provide
; General Driver-Wide Registry Settings
;************************************************************************
[HKEY_LOCAL_MACHINE\Drivers\Display\Intel]
;------------------------------------------------------------------------
; Following registry entry for
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; This value dictates the configuration to select for Per-Port settings
; from port specific registry. The settings mirror Windows XP EMGD drivers
; implementation Refer to the EMGD User Guide.
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Provide a list of port drivers to attempt to load upon boot time
;------------------------------------------------------------------------
#if defined BSP_TUNNEL_CREEK || defined BSP_TOPCLIFF || defined BSP_PCH_EG20T
“PortDrivers”=”analog ch7009 ch7017 fs454 lvds ns2501 ns387 sii164 ti410 th164 sdvo hdmi tv”
;------------------------------------------------------------------------
; Turn on to use stolen memory space. Leave off to re-allocate gart memory
;------------------------------------------------------------------------
;************************************************************************
; The Following Sections Provide Per-Config configuration
;************************************************************************
[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\General]
;------------------------------------------------------------------------
; Following registry entries for display settings:resolution, bit depth and
; Width & Height values must be hex, for example
; In vertical extended mode, height is doubled
;------------------------------------------------------------------------
#if defined BSP_TUNNEL_CREEK || defined BSP_TOPCLIFF || defined BSP_PCH_EG20T
;1366x768 is the highest resolution for the display panel we are using
;------------------------------------------------------------------------
;(all current EMGD 6.0 & above chipsets do not support 24 bpp)
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Refresh rate must be in hex:
; any refresh rate as long as the display port supports it refresh of '0'
; will take the first refresh that matches width, height and bpp
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Currently interlace is the only supported display flag
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Following is registry entry for controlled configuration of video memory
; The following settings are for a 64M platform, where the video memory is
; 14M at the top the above settings are assuming there is no system bios /
; firmware that has stolen memory from top of memory. If it does exist
; reduce ReservedMemorySize avoiding overlap exception for ACSFL, memory
; NOTE: CURRENTLY THESE SETTINGS ARE REMARKED FOR DYNAMIC VIDEO MEMORY
;------------------------------------------------------------------------
; “ReservedMemoryBase”=dword:03200000
; “ReservedMemorySize”=dword:00E00000
;------------------------------------------------------------------------
; Below is Maximum Frame Buffer Size used to limit the maximum size in bytes
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Independent DTDs with mouse restrictions to within screen
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Page Request Limit is used to control the max allocations of offscreen
; video surfaces, buffers etc.. value is in number of pages (4K).
; this is independent of dynamic or static memory configuration.
; The max for 845, 855, 852 = 128MB = 0x8000
; The max for 915s, 945s = 256MB = 0x10000
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Above settings are to define a minimum width and height that would allow
; for video surface allocations to succeed, eg: surfaces with width < 16 are
; forced to be in system-mem, surfaces with height < 16 are forced to be in
; system-mem only affects allocations of surfaces with
; GPE_PREFER_VIDEO_MEMORY flag
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Following are the registry entries for acceleration configuration
;------------------------------------------------------------------------
; Set SysToVidStrech to '1' enables driver to perform System to Video
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Blend filtering method selection
; The hardware must be capable of
; support, else, emulation is done.
; BlendFilter 2 == ANISOTROPIC
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Option for enabling/disabling TEARING - Default is OFF
;------------------------------------------------------------------------
; Set '1' to enable the NOTEARING option
;------------------------------------------------------------------------
; Specify whether to enable d3d
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Specify the dc (Display Configuration Definition)
; The display configuration (dc) is a unique 32-bit identifier that fully
; describes all displays in use and how they are attached to planes and
; pipes to form Single, Clone, Twin and Extended display setups.
; The DC is treated as 8 nibbles of information (nibble = 4 bits). Each
; nibble position in the 32bit DC corresponds to a specific role as
; ||||||||-- Legacy Display Configuration (Single, Twin, Clone, Ext)
; |||||||--- Port Number for Primary Pipe Master
; ||||||---- Port Number for Primary Pipe Twin 1
; |||||----- Port Number for Primary Pipe Twin 2
; ||||------ Port Number for Primary Pipe Twin 3
; |||------- Port Number for Secondary Pipe Master
; ||-------- Port Number for Secondary Pipe Twin 1
; |--------- Port Number for Secondary Pipe Twin 2
;------------------------------------------------------------------------
#if defined BSP_TUNNEL_CREEK || defined BSP_TOPCLIFF || defined BSP_PCH_EG20T
;------------------------------------------------------------------------
; Legacy Display configuration, single, twin ...
; When a complex (>2 displays) setup is defined, the legacy configuration
; will describe only a portion of the complete system.
; Possible Display Config combo:
; (Single is default if none specified)
; --> (Twin mode: common timing across ports)
; --> (Clone mode: distinct timing per port)
; DisplayConfig 5 == VEXT (vertical extend)
; --> (Vert Extended modes : “Height” )
; ( registry key value must be 2X the )
; ( intended port timings. Both ports )
; ( must use the same timings. For )
; ( example, for port timings of )
; ( 800x600, the DisplayConfig should )
; ( be 5 and the Height=1200 or 0x4b0 )
; ( Overlay wont work in VEXT mode. )
; (845 & 915GV doesn't support Vext)
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; PortOrder specifies the actual port that will be used for the primary and
; secondary ports. IF specified port is unavailable (port driver failed or
; display detection failed or port is not available on current chipset),
; then the next port in the above order will be used. PortOrder must be
; set, based on chipset specifications:
; ================================
; On i830/835/845/85x/865 chipsets:
; ================================
; On 835: If RGBA is used (DVO B & C together), then use DVO B number
; to specify any parameter for it.
;------------------------------------------------------------------------
#if defined BSP_TUNNEL_CREEK || defined BSP_TOPCLIFF || defined BSP_PCH_EG20T
;------------------------------------------------------------------------
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Set “1” to enable Display Detection
; DisplayDetect is to detect display child device before using it
; (panel/tv/etc...).BEWARE, setting this to '1' will mean display for the
; requested port wont be enabled if detection failed. Use this option
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Set “1” to enable Dual Overlay in Vertical Extended in Windows Embedded
; Compact 7. This is set by the user to enable Dual Hardware Overlays. This
; is a special flag for a specific usage. When two apps request overlays,
; these two will use the two hardware overlays
;------------------------------------------------------------------------
;------------------------------------------------------------------------
; Overlay Color Correction Settings
; Gamma: 32-bit integer in 24i.8f format, ranging from 0.6 - 6.0 decimal
; Brightness: 32-bit integer ranging from 0 to 0xFFFF. 0x8000 = no
; Contrast: 32-bit integer ranging from 0 to 0xFFFF. 0x8000 = no
; Saturation: 32-bit integer ranging from 0 to 0xFFFF. 0x8000 = no
;------------------------------------------------------------------------
; “OverlayGammaCorrectR”=dword:100
; “OverlayGammaCorrectG”=dword:100
; “OverlayGammaCorrectB”=dword:100
; “OverlayBrightnessCorrect”=dword:8000
; “OverlayContrastCorrect”=dword:8000
; “OverlaySaturationCorrect”=dword:8000
;************************************************************************
; The sections below are for the more detailed per port
; registry configurations. It follows the same usage model and
; key value meanings as the Windows INF registry configuration
; file. Refer to EMGD User Manual Sections 5.4.1 to 5.4.4
;************************************************************************
;---------------------------------------------------------------------
; Config 1 - DVO-B Port (For Almador) |
;---------------------------------------------------------------------
; entries for port's general config
;---------------------------------------------------------------------
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\2\General]
; “EdidAvail”=dword:7 ; STD TIMINGS + EDID TIMINGS + USER TIMINGS
; “EdidNotAvail”=dword:4 ; STD TIMINGS + USER TIMINGS
; EdidAvail and EdidNotAvail: <only 16 bits used>
; These 2 parameters can be used to control the available timings
; for any display. 'EdidAvail' is used when EDID is read from the
; display device. If an attempt to read EDID is failed or 'Edid = 0'
; then driver uses 'EdidNotAvail' flags.
; See below bit definitions for both 'EdidAvail' and 'EdidNotAvail'
; 0 - Do not use driver built-in standard timings
; 1 - Use driver built-in standard timings
; BIT1: <not applicable to EdidNotAvail>
; 1 - Use EDID block and filter modes
; If user doesn't provide EdidAvail and EdidNotAvail, then
; EdidAvail = Use Std timings + Use EDID block and Filter modes
; EdidNotAvail = Use Std timings
; Rotation entries must be at a right
; angle. An invalid entry will be ignored and
; and no rotation will happen for primary.
; In clone or twin modes, the secondary
; port defaults to follow the primary (if set)
; 0 degrees = 0 (not rotated = default)
; Flip has a valid entry of 1 to turn on
; and 0 to turn off. When turn on the display
; Rendered Scaling Configuration
; ------------------------------
; Scale works as a boolean switch. Valid
; entries are zero or 1. When “Scale” = 1,
; EMGD will scale the requested framebuffer
; resolution to the fixed native panel size
; indicated by per-port FPInfo, User-DTD or
; In clone or twin modes, the secondary
; port defaults to follow the primary (if set)
;---------------------------------------------------------------------
; Following are the registry entries
;---------------------------------------------------------------------
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\2\DVO]
;---------------------------------------------------------------------
; Following are the registry entries
; for port's flat panel's mode-limits,
;---------------------------------------------------------------------
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\2\FPInfo]
; Only need Width & Height if Panel cannot except other timings
;---------------------------------------------------------------------
; Following are the registry entries
; for ports first custom DTD mode to add
;---------------------------------------------------------------------
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\2\DTD\1]
;---------------------------------------------------------------------
; Following are the registry entries
; for ports second custom DTD mode to add
;---------------------------------------------------------------------
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\2\DTD\2]
;---------------------------------------------------------------------
; entries for the port device'
; display attribute parameters
; Use when enabling Port device
; example below is for Conexant
; on Port2 (DVO-B for almador)
; key names depend on port driver
;---------------------------------------------------------------------
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\2\Attr]
; “Composite and S-Video”=dword:1
;---------------------------------------------------------------------
; Config 1 - Analog Port (For Any Chipset)
;---------------------------------------------------------------------
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\5\General]
; “EdidAvail”=dword:7 ; STD TIMINGS + EDID TIMINGS + USER TIMINGS
; “EdidNotAvail”=dword:7 ; STD TIMINGS + USER TIMINGS
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\5\attr]
; “35”=dword:a0a0a0 ; gamma: 3i.5f format for R-G-B, ranging 0.6 to 6
; “36”=dword:808080 ; brightness: 0 to FF, 0x80 is no correction
; “37”=dword:808080 ; contrast: 0 to FF, 0x80 is no correction
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\5\DTD\1]
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\5\DTD\2]
;---------------------------------------------------------------------
; Config 1 - Int-LVDS Port (For 855 or 915GM) |
; Config 1 - Port 4 = Int-LVDS (US15, TUNNEL_CREEK and Mobiles)
;---------------------------------------------------------------------
#if defined BSP_TUNNEL_CREEK || defined BSP_TOPCLIFF || defined BSP_PCH_EG20T
[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\4\General]
“EdidAvail”=dword:0 ; STD TIMINGS + EDID TIMINGS + USER TIMINGS
“EdidNotAvail”=dword:4 ; STD TIMINGS + USER TIMINGS
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\4\General]
; “EdidAvail”=dword:7 ; STD TIMINGS + EDID TIMINGS + USER TIMINGS
; “EdidNotAvail”=dword:7 ; STD TIMINGS + USER TIMINGS
#if defined BSP_TUNNEL_CREEK || defined BSP_TOPCLIFF || defined BSP_PCH_EG20T
[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\4\FPInfo]
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\4\FPInfo]
; Only need Width & Height if Panel cannot except other timings
#if defined BSP_TUNNEL_CREEK || defined BSP_TOPCLIFF || defined BSP_PCH_EG20T
[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\4\Attr]
; Attribute “27” = Dual Channel (boolean)
; Attribute “18” = Panel Fit Upscale (boolean)
; Attribute “26” = Panel Depth - 18 or 24
; Attribute “60” = Fixed timing
; Attribute “70” = Backlight PWM intensity
; Attribute “71” = Invertor frequency
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\4\Attr]
; Attribute “27” = Dual Channel (boolean)
; Attribute “18” = Panel Fit Upscale (boolean)
#if defined BSP_TUNNEL_CREEK || defined BSP_TOPCLIFF || defined BSP_PCH_EG20T
[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\4\DTD\1]
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\4\DTD\1]
;HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\4\DTD\2]
;---------------------------------------------------------------------
; Config 1 - SDVO Port-B (For Napa)
;---------------------------------------------------------------------
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\General]
; “name”=”EMGD SDVO Configuration File”
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\2\General]
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\2\FPInfo]
; For a SDVO driver, sample settings for the panel:1400x1050
; Only need Width & Height if Panel cannot except other timings
;[HKEY_LOCAL_MACHINE\Drivers\Display\Intel\ALL\1\Port\2\Attr]
; Attribute “27” = Dual Channel (boolean)
; Optional - Only enable for font anti-aliasing
; Enabling this causes minor performance impact
; Only recommended for TV Output.
;[HKEY_LOCAL_MACHINE\System\GDI\Fontsmoothing]
;[HKEY_LOCAL_MACHINE\System\GDI]
;*************** INTEL DISPLAY DRIVER REGISTRY ENTRY END ****************
;************************************************************************