KOH_CH7308_port_attrib
Chrontel CH7308 Port Driver Attributes
The table below shows the attributes for the Chrontel
CH7308* port driver.
Note: For
FPINFO panel width, height, and backlight timing settings, please see
Table 21. Parameter Configuration Format.
Table 37. Chrontel CH7308 Port Driver Attributes
Attribute Name
|
Attribute ID
|
Description
|
Possible Ranges
|
LVDS COLOR DEPTH
|
26
|
Panel depth
|
18 = 18 bits
24 = 24 bits
Default = 18
|
DUAL_CHANNEL
|
27
|
Dual-channel pane
|
Default - 0
|
SPREAD SPECTRUM CLOCKING
|
43
|
Spectrum Clocking
|
0-15
Default = 7
Step = 1
|
DITHER
|
45
|
Dither setting
|
Default = 0
|
HSYNC PANEL PROTECTION
|
46
|
Horizontal sync panel protection
|
Default = 0
|
VSYNC PANEL PROTECTION
|
47
|
Vertical sync panel protection
|
Default = 0
|
PIXEL CLOCK PROTECTION
|
48
|
Pixel clock protection
|
Default = 0
|
LVDS PANEL TYPE
|
49
|
LVDS panel connector.
|
0 = SPWG formatted LVDS output (default)
1 = OpenLDI unbalanced color mapping output
Default = 0
|
TEXT ENHANCEMENT
|
58
|
Controls text tuning.
|
0-4.
|
FIXED TIMING
|
60
|
This indicates whether attached display is a fixed
timing display.
|
0 = off
1 = on
|
*Other names and brands may be claimed as the property of others.
Revised April 2013
