 919843890.370 -     MCLK 0065 1 00000000 MVDM CLOCK/TIMER test case: MCLK
 919843890.380 -     MCLK 0067 1 00000000 -- doing 1 repetitions with 0 second delay
 919843890.380 -     MCLK 0204 5 00000000 control_path = 
 919843893.390 -     MCLK 0254 1 00000000 Starting pass 0
 919843893.390 -     MCLK 0267 5 00000000 Command = A, Clock test
 919843896.420 -     MCLK 0267 5 00000000 Command = A, Clock test
 919843905.450 -     MCLK 0267 5 00000000 Command = A, Clock test
 919843908.450 -     MCLK 0267 5 00000000 Command = A, Clock test
 919843911.450 -     MCLK 0267 5 00000000 Command = B, Speaker test
 919843920.450 -     MCLK 0267 5 00000000 Command = B, Speaker test
 919843923.450 -     MCLK 0267 5 00000000 Command = B, Speaker test
 919843926.450 -     MCLK 0267 5 00000000 Command = B, Speaker test
 919843935.450 -     MCLK 0267 5 00000000 Command = C, VCMOS test
 919843944.450 -     MCLK 0614 1 00000000  
 919843950.450 -     MCLK 0267 5 00000000 Command = C, VCMOS test
 919843953.450 -     MCLK 0614 1 00000000  
 919843953.450 -     MCLK 0267 5 00000000 Command = C, VCMOS test
 919843956.450 -     MCLK 0614 1 00000000  
 919843962.450 -     MCLK 0267 5 00000000 Command = C, VCMOS test
 919843968.450 -     MCLK 0614 1 00000000  
 919843974.450 -     MCLK 0267 5 00000000 Command = D, VTimer test
 919843977.480 -     MCLK 0267 5 00000000 Command = D, VTimer test
 919843980.510 -     MCLK 0267 5 00000000 Command = D, VTimer test
 919843989.550 -     MCLK 0267 5 00000000 Command = D, VTimer test
 919843992.610 -     MCLK 0267 5 00000000 Command = A, Clock test
 919843995.640 -     MCLK 0480 4 00000000 @@@@@ WARNING: System Timer is not getting updated correctly
 919844001.640 -     MCLK 0267 5 00000000 Command = B, Speaker test
 919844010.670 -     MCLK 0267 5 00000000 Command = C, VCMOS test
 919844010.670 -     MCLK 0614 1 00000000  
 919844010.670 -     MCLK 0267 5 00000000 Command = D, VTimer test
 919844013.730 -     MCLK 0293 5 00000000 Pass number 2 starting

 MCLK                     PASS            
